1. Field of the Invention
This invention relates to apparatus for predicting the outcome of jump (branch) instructions.
The invention is particularly, although not exclusively, concerned with jump prediction in a pipelined data processing system.
2. Background Information
In a data processing system, instructions are normally executed sequentially. However, a jump instruction can specify that a jump is to be made out of this normal sequence. The jump instruction may be unconditional, which means that a jump is made whenever the instruction is executed. Alternatively, the jump instruction may be conditional, which means that a jump is made only if a specified condition (e.g. the contents of an accumulator register are greater than zero) is satisfied. A jump instruction may be absolute, which means that a jump is made to a specified absolute address. Alternatively, the jump instruction may be relative, which means that a jump is made to an address displaced by a specified amount from the current instruction.
In the case of a pipelined processor, conditional jump instructions present a particular problem. In general, the actual condition upon which the jump depends will not be available until the instruction approaches the end of the pipeline. If the condition indicates that a jump is to be made, then all later instructions that have been started in the pipeline will be invalid and must be abandoned. Clearly, this slows down the operation of the system.
One way of reducing the problem is to attempt to predict the likely outcome (jump/no jump) of the conditional jump instruction, and to prefetch the next instruction into the pipeline on the basis of this prediction. If the predictions are correct, then it is not necessary to abandon any subsequent instructions and so the operation of the pipeline can continue without any hold-ups.
One way of predicting the outcomes of jump instructions is to maintain a table which records the outcomes of previously executed jump instructions at given memory locations. Whenever a jump instruction is encountered at one of these given memory locations, the table is accessed to provide a prediction, on the assumption that the outcome will be the same as last time the instruction was executed. One such prediction mechanism is described in U.S. Pat. No. 4,477,872.
One object of the present invention is to provide an improved apparatus for predicting the outcome of conditional jump instructions.